--- v850.md.bitmemv850	2011-09-14 03:17:03.000000000 +0900
+++ v850.md	2012-12-22 07:19:09.725063191 +0900
@@ -2698,4 +2698,470 @@
   [(set_attr "length" "4")
    (set_attr "cc" "clobber")])
 
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (set (match_operand:SI 3 "register_operand" "")
+        (const_int -128))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (ior:SI (match_dup 2)
+	  	    (match_dup 3)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (ior:SI (subreg:SI (match_dup 1) 0)
+	                      (const_int 128)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (and:SI (match_dup 2)
+	  	    (const_int 127)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (3, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (and:SI (subreg:SI (match_dup 1) 0)
+	                      (const_int 127)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (set (match_operand:SI 3 "register_operand" "")
+        (const_int -128))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (xor:SI (match_dup 2)
+	  	    (match_dup 3)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (xor:SI (subreg:SI (match_dup 1) 0)
+	                      (const_int 128)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (ior:SI (match_dup 2)
+	  	    (match_operand 3 "power_of_two_operand" "")))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (3, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (ior:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 3)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (sign_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (parallel [
+     (set (match_dup 2)
+	   (ior:SI (match_dup 2)
+	  	    (match_operand 3 "power_of_two_operand" "")))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (ior:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 3)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (sign_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_operand:SI 3 "register_operand" "")
+        (const_int -128))
+   (parallel [
+     (set (match_dup 2)
+	   (ior:SI (match_dup 2)
+	  	    (match_dup 3)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (5, operands[0])
+   && peep2_reg_dead_p (5, operands[3])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (ior:SI (subreg:SI (match_dup 1) 0)
+	                      (const_int 128)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (zero_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (parallel [
+     (set (match_dup 2)
+	   (ior:SI (match_dup 2)
+	  	    (match_operand 3 "power_of_two_operand" "")))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (ior:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 3)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (set (match_operand:SI 3 "register_operand" "")
+        (const_int -128))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (ior:SI (match_dup 2)
+	  	    (match_dup 3)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (parallel [
+     (set (match_dup 2)
+	   (zero_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (5, operands[0])
+   && peep2_reg_dead_p (5, operands[3])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (ior:SI (subreg:SI (match_dup 1) 0)
+	                      (const_int 128)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (sign_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_operand:SI 3 "register_operand" "")
+        (match_operand:SI 4 "not_power_of_two_operand" ""))
+   (parallel [
+     (set (match_dup 2)
+	   (and:SI (match_dup 2)
+	  	    (match_dup 3)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (5, operands[0])
+   && peep2_reg_dead_p (5, operands[3])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (and:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 4)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (and:SI (match_dup 2)
+	  	    (match_operand 3 "const_int_operand" "")))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && not_power_of_two_operand (operands[3], QImode)
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (3, operands[0])
+   "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (and:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 3)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (set (match_operand:SI 3 "register_operand" "")
+        (match_operand:SI 4 "not_power_of_two_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (and:SI (match_dup 2)
+	  	    (match_dup 3)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+   && peep2_reg_dead_p (4, operands[3])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (and:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 4)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (sign_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (parallel [
+     (set (match_dup 2)
+	   (xor:SI (match_dup 2)
+	  	    (match_operand 3 "power_of_two_operand" "")))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (xor:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 3)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (zero_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (parallel [
+     (set (match_dup 2)
+	   (xor:SI (match_dup 2)
+	  	    (match_operand 3 "power_of_two_operand" "")))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (xor:SI (subreg:SI (match_dup 1) 0)
+	                      (match_dup 3)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+(define_peephole2
+  [
+   (set (match_operand:QI 0 "register_operand" "")
+        (match_operand:QI 1 "memory_operand" ""))
+   (parallel [
+     (set (match_operand:SI 2 "register_operand" "")
+	   (plus:SI (match_dup 2)
+	  	     (const_int -128)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (parallel [
+     (set (match_dup 2)
+	   (sign_extend:SI (match_dup 0)))
+     (clobber (reg:CC CC_REGNUM))
+   ])
+   (set (match_dup 1)
+        (match_dup 0))
+  ]
+  "1
+   && REGNO (operands[0]) == REGNO (operands[2])
+   && peep2_reg_dead_p (4, operands[0])
+  "
+  [
+   (parallel [
+     (set (match_dup 1)
+          (subreg:QI (xor:SI (subreg:SI (match_dup 1) 0)
+	                      (const_int 128)) 0))
+     (clobber (reg:CC CC_REGNUM))
+    ])
+  ]
+  "
+  "
+)
+
+
+
+